RISC-V Summit

This event has passed. Please visit the upcoming RISC-V Summit.

Call For Proposals (CFP)


The RISC-V Global Summit provides a platform for experts at every stage of their careers, and for those working within organizations and companies from leading research institutions to technology startups to global industry leaders.

Information on how to propose an industry or technical session for this year is below. Successful submissions will inspire, educate, and offer actionable takeaways for attendees. The best speakers demonstrate their commitment to and enthusiasm for their topic.

The Call for Proposals application will be open until Friday, September 9 at 11:59pm PDT.

Speakers will be notified by Tuesday, October 4, 2022.

The schedule will be announced on Wednesday, October 5, 2022.

Questions? Contact us at speakers@riscv.org.


Industry and technical program committees work in parallel to evaluate and select the most groundbreaking, informative, compelling proposals in each category. Each committee comprises active RISC-V members who are also distinguished experts and thought leaders in their respective areas. Industry submissions are evaluated by the Industry Program Committee and technical submissions are evaluated by the Technical Program Committee. RISC-V International leadership is available to counsel the committees as requested. The committees’ decisions are final. 

Want to increase your chances of being selected? Consider including a discussion of how your topic impacts the RISC-V software ecosystem.

A word about inclusion. Global innovation achieves its full potential when individuals from all backgrounds participate. RISC-V International calls on the worldwide design and development community to work toward full representation and a diversity of voices for the RISC-V Global Summit North America 2022.

RISC-V does not pay speakers to participate in the conference program or travel to the Summit.


RISC-V industry sessions break new ground – they include major announcements, offer new wisdom and insight, address front-line challenges to growing the RISC-V market, issue a call to action to the global RISC-V community, and more. Sessions can take any form, from presentations to debates to panels and more. 

The following are the industry tracks for this year (in alphabetical order):

  • Automotive
  • Building a Software Ecosystem
  • Edge & IoT
  • Communications & Networking (including 5G and CBRS small-cell networks)
  • Corporate and Market Development (including investing)
  • High-Performance Computing & Data Centers

Panel submissions must identify and include confirmed panelists and moderators. RISC-V International does not accept submissions with all-male panels in an effort to increase speaker diversity.


Our technical sessions describe the “how” of RISC-V, including how something was achieved or how it works. These talks may describe research, development, or a product. They may describe work that is open source or proprietary.

The chairs and vice chairs of RISC-V’s eight technical committees have chosen the following four topics for technical tracks:

  • Instruction Set Architecture (ISA): The ISA track welcomes submissions related to the RISC-V ISA, including evaluations of existing features, proposals for new ISA standard extensions, and descriptions and evaluations of custom ISA extensions. Submissions covering the active areas of virtualization, security, and AI/ML for RISC-V are particularly encouraged.
  • Software (including stacks and development tools): Hardware solutions are brought to life through their software ecosystem: Only the availability of applications, domain-specific solution stacks, and development tools bridge the gap from a technology to a user-centric product. The RISC-V ISA has matured over its first decade and still is rapidly adding new capabilities (such as quality-of-service). To ensure future success and widespread adoption, the focus now moves to the availability of an optimized software ecosystem. This track will explore the software, applications, and RISC-V centric advances (such as different techniques for the optimization of machine learning with RISC-V) that will define the next decade of this architecture.
  • Systems-on-Chip (SoC): RISC-V based system-on-chip designs target varying design points, target segments, and uses across enterprise, cloud, telecom, instrumentation, aerospace, automotive, retail, and more. This track will explore the foundational technologies needed to build RISC-V based SoCs, such as technologies for boot security, firmware resilience, power and thermal management, virtualization, confidential computing, Quality of Service (QoS), debug, trace, machine monitoring, Reliability Availability Serviceability (RAS), and so on. This track will also explore emerging trends in SoC design and integration.
  • Security: The emergence of exploits such as malware, trojans, and the recent Spectre, Meltdown, RAMbleed attacks has resulted in serious financial and reputational losses. This illustrates the need to consider security as an essential component, directly built into a system rather than layered on top. RISC-V is a clean-slate architecture with a unique opportunity to build in innovative security as an intrinsic part of the hardware, software and firmware. This track will explore the Security of RISC-V – attacks, mitigations and extensions across the whole range of workloads and applications.

Panel submissions must identify and include confirmed panelists and moderators. RISC-V International does not accept submissions with all-male panels in an effort to increase speaker diversity.


One complimentary RISC-V Summit pass will be provided for each primary and co-speaker per accepted submission. For panel sessions, all panelists will receive a complimentary pass.


RISC-V International is dedicated to providing a harassment-free experience for participants at all of our events. All presenters will be required to review and follow our Code of Conduct.

We also highly recommend that speakers take our Inclusive Speaker Orientation Course.


Contact us at speakers@riscv.org.







Startup, End User & University